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Semiconductor
SD42C/P4404
4Bit Single Chip Microcontroller
Description
The SD42C4404(4302) is a 4-bit single chip micro-computer having 4K(2K) bytes ROM and is designed with CMOS silicon gate technology. The SD42C4404 includes such peripherals as various timers, A/D converter, serial communication interface, on-chip oscillator and clock circuitry. The high performance CPU and internal peripherals allow flexible & cost effective system design in industrial and home appliances. And the OTP device (42P4404) can shorten system development periods and help the process for software debugging.
Ordering Information
Type NO. SD42C4404 Marking SD42C4404 Package Code. 28SOP/30SDIP/36SSOP
Pin Configuration
P12 / SO P11 / SI P00 / INT0 / TI0 P01 / INT1 PA0 / AD0 PA1 / AD1 P60 P61 P62/CLO RESETB TEST Vss XI
1 2 3 4 5 6 7 8 9 10 11 12 13 28SOP
28 27 26 25 24 23 22 21 20 19 19 18 16 15
P13 /SCK VDD P13 / BUZ P42 / KS2 P41 / KS1 P40 / KS0 P53 / KS7
P10 / SCK P12 / SO P11 / SI P00 / INT0 / TI0 P01 / INT1 PA0 / AD0 PA1 / AD1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 30SDIP
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
VDD P13 / BUZ P42 / KS2
P10 / SCK P12 / SO P11 / SI P00 / INT0 /TI0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36SSOP
36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19
VDD P13 / BUZ P42 / KS2 P41 / KS1 NC P40 / KS0 NC P53 / KS7 P52 / KS6 P51 / KS5 P50 / KS4 P83 P82 P81 P80 NC XO XI
P41 / KS1 P40 / KS0 P53 / KS7 P52 / KS6 P51 / KS5 P50 / KS4 P83
P01 / INT1 NC PA0 / AD0 PA1 / AD1 PA2 / AD2 PA3 / AD3 P60
P52 / KS6 PA2 / AD2 P51 / KS5 PA3 / AD3 P50 / KS4 P60 P83 P61 P82 P62 / CLO P81 P80 RESETB TEST VSS
P61 P82 P81 P80 XO TEST XI VS S P62 / CLO NC NC RESETB
XO 14
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SD42C/P4404
Features
Memory mapped I/O Program memory : 4096 x 10bits (DMC42C4404) 2048 x 10bits (DMC42C4302) Data memory : 512 x 4bits (DMC42C4404) 256 x 4bits (DMC42C4302) 8-bit serial communication interface - External / Internal clock selection - Mode : Transmit, Receive Receive only Clock continuous 8-bit A/D converter - 8-bit successive approximate type - 4 channels - Sample and hold - Conversion time : 17.1us at 4.19MHz 24 I/O Pins - CMOS Pins : 16 - High current LED direct drive pins - Internal pull-up resistor ( Mask option ) - Internal pull-down resistor ( Mask option ) Power saving mode - STOP : Main clock, CPU clock stop - STBY : Only CPU clock stop Main clock operation Operating voltage range - V DD = 2.5 ~ 5V 10% Operating temperature range - TA = -40E to +85E
Instructions - Various bit manipulation - 8-bit data operation - 7-bit relative branch - 1 byte absolute call Instruction cycle times ( XI = 4.19MHz ) - 15.3 us ( XI/64 = 65.5KHz ) - 1.91 us ( XI/8 = 524.0KHz ) - 0.95 us ( XI/4 = 1.05MHz ) 4 Register Bank General register : 8 x 4-bit respectively Accumulator - Bit Accumulator (CY), 4 bit Accumulator (A), 8 bit Accumulator (XA) Multiple vectored interrupt source - External interrupt : 3 - Internal interrupt : 4 Watch timer (at 4.19MHz) - fast mode : 3.91 msec - normal mode : 0.5 sec - buzzer output : 1, 2, 4 KHz
APPLICATION
Basic interval timer - 8 kinds of period - Used stabilization wait timer to wake up Stop mode One 8-bit timer / event counter Key scan - 7 channels Telephone, General
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SD42C/P4404
BLOCK DIAGRAM
BASIC INTERVAL TIMER IRQBT
PORT0
P00 - P01
BUZ / P13
WATCH TIMER IRQWT
SD42CORE
PORT1
P10 - P13
PORT4
TI0 / P00 TIMER/EVENT COUNTER 1 IRQTC 0
P40 - P42
PORT5
SCK / P10 SI / P11 SO / P12 SERIAL INTERFACE
P50 - P53
PROGRAM MEMORY
IRQS0
DATA MEMORY PORT6 P60 - P62 (512 X 4BITS)
(4096 X 10BITS)
INT0 / P00 INT1 / P01
INTERRUPT CONTROL n
PORT8 Fx / 2 CLOCK OUTPUT CONTROL
CPU CLOCK
P80 - P83
PA0~PA3/ AD0-AD3
8-BIT ADC
CLOCK DIVIDER
CLOCK GENERATOR
STOP/ IDLE CONTROL
PORTA
PA0 - PA3
IRQAD
V DD
V SS
XO
XI
RESETB
P62 / CLO
KSI-W031-000
TEST
3
SD42C/P4404
Program Memory (ROM)
CONTENTS VECTOR ADDRESS AREA ZERO-PAGE CALL AREA
005FH 0060H
Vector Address
Prioty 0 1 2 3 5 INTERRUPT SUORCE Reset Signal RESET Basic Interval Timer IRQBT IRQ0 IRQ1 IRQTC1
External interrupt 0 External interrupt 1
0000H
0000H 0002H 0004H 0006H 0008H 000AH 000CH 000EH 0010H 0012H 0014H
001FH 0020H
Timer Event Counter 1
9 10 12 13 15
IRQS0 IRQAD IRQWT IRQKS -
Serial I/O 0 8 bit ADC
4K Byte
0016H 0018H 001AH 001CH Watch Timer Key Scan
0FFFH
001EH
reserved
Data Memory (RAM)
DIRECT m
$00 PAGE0 (256 Byte) $FF $00 PAGE1 (256 Byte)
INDIRECT @HL @DE @DL
STACK
GENERAL REGISTER RB=0 RB=1 RB=2 RB=4
MP=0
SPS=0
MB=0
MB=0
MP=1
SPS=1
BANK 0 $FF $00 (1K)
PAGE2 (256 Byte) $FF $00 PAGE3 (256 Byte) $FF
MP=2
SPS=2
I/O MEMORY
MP=3
; Usable
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SD42C/P4404
I/O Address Map
ADDRESS b3 318H 319H 31AH 31BH 31CH 31DH 326H 327H 328H 329H 32AH 32BH 332H 334H 335H 336H 337H 386H 387H 388H 389H 3A0H 3A2H 3A4H 3A8H 3A9H 3AAH 3ABH 3B2H 3C3H 3C4H 3C5H 3D8H 3D9H 3DAH 3DBH 3DCH IETC1 IE1 IRQTC1 IRQ1 IE0 IRQ0 IEAD8 IRQAD8 Power control register (PCON) Operating mode register (SCMOD) Clock output mode register (CLOMD) Serial interface mode register0 (SIOM0) Serial interface buffer0 (SBUFF0) Power on flag (PONF) IPSR3 (IMOD0) External interrupt mode register1 (IMOD1) IEBT IEWT IES0 IRQBT IRQWT IRQS0 R/W R/W R/W R/W R/W O O O O O O O O O O W O IPSR2 IPSR1 IPSR0 W O external interrupt 0 edge detection external interrupt 1 edge detection Interrupt EN/IRQ flag Interrupt EN/IRQ flag Interrupt EN/IRQ flag Interrupt EN/IRQ flag Interrupt EN/IRQ flag 0 0 0 0 0 00 00 External interrupt mode register0 P/W
3B2H.0
Hardware Module Name b2 b1 b0
R/W
Addressing Unit 1 bit 4 bit 8bit O O O O O
326H.3
REMARKS
INITIAL VALUE
Stack pointer low (SPL) Stack pointer high (SPH) SP3 AC CY (TMOD1) T/E counter register 1 (TMCNT1) T/E reference register 1 (TMREF1) Basic Timer mode register(BMOD) Basic interval timer count register(BITCNT) Watch timer mode register (WMOD) Adc8 mode register (ADCM8) Adc8 output latch (ADCOL8) Z SP2 SP1 SP5 IS1 OV SP0 SP4 IS0 T
R/W R/W R/W R/W R/W W R W R/W R R/W R/W R O R/W R/W W W R/W
3A8H.3 336H.3 332H.3
Stack pointer low stack pointer high Stack Page Select Low (SPSL) Stack Page Select High (SPSh) Psw low (PSWL) Psw high (PSWH) clock source select. counter start (ch1) readable count value (ch1) count reference register (ch1) clock select, Bit start readable count register clock/buzzer select. bit3 readable
E F 0 0 0 0 00 00 FF 0 00 00 00 00 00 0 00 00 XX 0
O
O
T/E counter mode register 1
386H.3
O O
analog input pin select. start & low 4bit readable 8bit conversion data system clock select, idle, stop mode main/sub system clock select
O O O
cpu clock output select, clock out EN/DIS receive/transmit mode. clock select serial shift register 0 O power on reset flag
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SD42C/P4404
ADDRESS b3 3DDH 3DEH 3E0H 3E1H 3E4H 3E5H 3E6H 3E7H 3E8H 3E9H 3EAH 3EBH 3F0H 3F1H 3F4H 3F5H 3F6H 3F8H 3FAH PW03 PW13 PW43 PW53 PW63 PW73 PW83 PW93 PWA3 PWB3 PW02 PW12 PW42 PW52 PW62 PW72 PW82 PW92 PWA2 PWB2 PW01 PW11 PW41 PW51 PW61 PW71 PW81 PW91 PWA1 PWB1 PW00 PW10 PW40 PW50 PW60 PW70 PW80 PW90 PWA0 PWB0 R/W R/W R/W R/W R/W R/W R/W O O O O O O O O O O O O O O O R0 Port Data Register R1 Port Data Register R4 Port Data Register R5 Port Data Register R6 Port Data Register R8 Port Data Register RA Port Data Register 0 0 0 0 0 0 0 W O port a, b mode register (PMGF) 00 W O port 8, 9 mode register (PMGE) 00 W O port 6, 7 mode register (PMGD) 00 W O port 4, 5 mode register (PMGC) 00 IETC2 Hardware Module Name b2 IRQTC2 b1 b0 R/W R/W W R/W Addressing Unit 1 bit O O 4 bit O O O 8bit Interrupt EN/IRQ flag Interrupt EN/IRQ flag port 0, 1 mode register (PMGA) REMARKS INITIAL VALUE 0 0 00
PORT0 (R0) PORT1 (R1) PORT4 (R4) PORT5 (R5) PORT6 (R6) PORT8 (R8) PORTA (RA)
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SD42C/P4404
Pin Description
PIN SYMBOL P00 P01 P10 P11 P12 P13 P4 P5 P6 P8 PA INT0/TI0 INT1 SHARED PIN
INT0/TI0
I/O
FUNCTION 4-BIT I/O PORT
RESET
PORT TYPE BPS
INT1 SCK SI SO BUZ AD0~AD3
I/O I/O
PORT 0 4-BIT I/O PORT PORT 1 4-BIT I/O PORT. PORT4 4-BIT I/O PORT. PORT5 4-BIT I/O PORT. PORT6 4-BIT I/O PORT. PORT8 4-BIT I/O PORT. PORTA External interrupt input port INPUT BPS BPS BD BP BD BPS BPS
P00 P01 I
rising/falling edge detection Event pulse input port for the timer/event counters
SCK SI SO BUZ Key Scan AD0~AD3 XI
P10 P11 P12 P13 P4-P5 PA -
I/O I O O I I I O
Serial clock in/out port Serial data input port Serial data output port Buzzer output port Key scan input Analog input for the 8-bit A/D converter XI, XO are the input and output, respectively, of an inverting amplifier. The pins can be configured for use as an on-chip oscillator. Reset input pin Normally connect to VSS Power & ground
BPS
BP OSC1
XO RESETB TEST VDD , VSS -
I I
IP1 IP2
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SD42C/P4404
I/O Circuits
BP
VDD VDD
BPS
VDD VDD
OUTPUT ENABLE DATA
PUR (M.O) PAD
OUTPUT ENABLE DATA
PUR (M.O) PAD
VSS INTERNAL INTERNAL
VSS
BD
VDD
OSC1
PUR (M.O) DATA OUTPUT ENABLE PAD XI XO
VSS INTERNAL VSS
IP1
VDD
IP2
PAD
PAD VSS
NOTE)
PUR : Pull-Up Resistor M.O : Mask Option
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SD42C/P4404
Absolute Maximum Ratings
(TA = 0E to 70E, VDD = 5V 10%, fX = 4.19MHz) PARAMETER Supply Voltage Input Voltage Output Voltage Output Current High SYMBOL VDD VI VO IOH CONDITION All I/O ports One I/O port active All I/O ports active Output Current Low One I/O port active Total value for ports IOL P0, P1, P4, P5, P6, P8, PA Operating Temperature Storage Temperature TA Tstg RMS Value -40 to +85 -55 to +125 +60 E E RATING -0.3 to +7.0 -0.3 to VDD+0.3 -0.3 to VDD+0.3 -15 -30 Peak Value RMS Value Peak Value +30 +15 +100 mA UNIT V V V mA
* RMS values are calculated as peak value x damage to the device.
Duty
* Exceeding beyond those listed values under "Absolute Maximum Ratings" may cause permanent
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SD42C/P4404
DC Electrical Characteristics
(VSS = 0, V DD = 5V 10%, TA = 25E, f X = 4.19MHz) PARAMETER SYMBOL TEST CONDITION High Level Input Voltage VIH1 V IH2 V IH3 Port 0,1 (Schmitt Input) XI Port 4,5,6,8,A RESETB, TEST Port 0,1 (Schmitt Input) XI Port 4,5,6,8,A RESETB, TEST Port 0,1,6,A V OH Port 0,1,6,A Port 4, 5 (Open-Drain) V OL Port 0,1,6,A Port 0,1,6,A High Level Input Leakage Current Low Level Input Leakage Current Supply Current IDD1 Main Clock (XI) = 4.19MHz IIL IIH (IOH = - 100uA) (IOL = 10mA) (IOL = 10mA) (IOL = 1mA) Port 0,1,4,5,6,8,A VPPOEX, RESETB XI Port 0,1,4,5,6,8,A VPPOEX, TEST XI Dynamic Mode Idle Mode 5 VDD = 5V 10% -5 -15 10 mA 5 -1.2 15 -3 uA 4.6 4.9 0.4 0.1 1.2 2 0.6 0.3 3 uA V (IOH = - 5mA) MIN. 0.8 V DD V DD - 0.5 0.7 VDD LIMIT TYP. 4.5 MAX. V DD V DD VDD V UNIT
Low Level Input Voltage
V IL1 VIL2 V IL3
0 0 0 4.2
0.2 V DD 0.4 0.3 V DD V
High Level Output Voltage Low Level Output Voltage
-
V
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SD42C/P4404
DC Electrical Characteristics
(VSS = 0, V DD = 5V 10%, TA = 25E, fX = 4.19MHz) PARAMETER SYMBOL TEST CONDITION Supply Current IDD2 Main Clock (XI) = 2MHz IDD5 Dynamic Mode Idle Mode Stop Mode VDD = 3V 10% VDD = 5V 10% Main Clock (XI) = 4.19MHz VDD = 3V 10% 20 10 1 0.5 1 5 uA 3 60 Kohm 30 MIN. LIMIT TYP. MAX. 2 mA UNIT
Pull-up Resistor Pull-down Resistor
RL1 RL2
VI = 0V, VDD = 5V 10% RESETB VI = 0V, VDD = 5V 10% TEST
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SD42C/P4404
AC Electrical Characteristics
(TA = -40 to +85 E, VDD = 2.7 to 6.0V) PARAMETER Cycle Time SYMBOL TEST CONDITION V DD = 4.5 to 6.0V V DD = 2.7 to 3.3V MIN. 0.95 TYP. MAX. 64 UNIT uS
tCY
Main system clock
3.8
-
64
uS
TI0 Input Frequency
fTI tTIH tTIL tINTH tINTL tKCY
V DD = 4.5 to 6.0V V DD = 2.7 to 3.3V
0 0 0.48 1.8 (1) 10 10 Input Output 800 1600 3200 3800 400
tKCY/2~50
-
1 275 300 250 1000 1000 -
MHz KHz uS uS uS uS uS nS nS nS nS nS nS nS nS nS nS nS nS nS nS nS nS uS
TI0 Input High, Low Level Width Interrupt Input High, Low Level Width
V DD = 4.5 to 6.0V V DD = 2.7 to 3.3V INT0 INT1 KS0 to 7 V DD = 4.5 to 6.0V
SCK Cycle Time
VDD = 2.7 to 3.3V SCK High, Low Level Width
Input Output
tKH tKL
Input V DD = 4.5 to 6.0V Output Input Output Input Output
V DD = 2.7 to 3.3V
1600
tKCY/2~150
SI Set up Time to SCK High SI Hold Time to SCK High SCK to S0 Output Delay Time
tSIK tKSI tKSO
V DD = 4.5 to 6.0V
100 150 400 400 10
Input Output Input Output V DD = 2.7 to 3.3V Input Output
RESETB Low Level
tRSL
(1) 2tcy or 128/fX, depending on the setting of the interrupt mode register.
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SD42C/P4404
AC Timing Measurement Points (Except XI)
0.8V DD 0.2V DD
Measurement Points
0.8V DD 0.2V DD
Clock Timing tXL XI
1/XI tXH VDD-0.5V 0.4V
Timer Event Counter Timing 1/fTI t TIL TI0 t TIH 0.8VDD 0.2VDD
Serial Transfer Timing t KCY t KL SCK tKH 0.8V DD 0.2V DD tSIK SI tKSI 0.8V DD 0.2V DD Output Data
t KSO
Input Data
SO
Interrupt Input Timing tINTL INT0~1 KS0~7 tINTH 0.8V DD 0.2V DD
RESETB Input Timing RESETB t RSL
0.2V DD
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SD42C/P4404
RAM Data Retention Characteristics ( in STOP Mode )
(TA = -40 to +85E) PARAMETER Data Retention Supply Voltage Data Retention Supply Current Release Signal Set Time Oscillation Stabilization Wait Time SYMBOL V DDDR TEST CONDITION MIN. 2.0 TYP. MAX. 6.0 UNIT V
IDDDR
VDDDR = 2.0V
-
0.1
10
uA
tSREL When released by RESETB When released by interrupt Signal
0 -
217/fx
NOTE 1)
-
uS mS mS
tWAIT
NOTE 1) Depends on the setting of the basic interval timer mode register. (refer to the table below)
( fX = 4.19MHz ) BMOD2 0 0 1 1 BMOD1 0 1 0 0 BMOD0 0 1 0 1 Oscillation Stabilization 220/fX (Approximately 250ms) 217/fX (Approximately 31.3ms) 215/fX (Approximately 7.82ms) 213/fX (Approximately 1.95ms)
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SD42C/P4404
RAM Data Retention Timing
When STOP mode is released by RESETB input Internal Reset Operation Stabilization Wait Time STOP Mode RAM Data retention V DD Operation Mode
V DDDR STOP instruction execution t SREL RESETB
tWAIT
When STOP mode is released by interrupt signal Stabilization Wait Time STOP Mode RAM Data retention V DD Operation Mode
V DDDR STOP instruction execution t SREL
Interrupt Signal (Rising Edge)
tWAIT
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SD42C/P4404
SD42P4404
Description
The SD42P4404 is a system evaluation LSI having a built in One-time PROM for SD42C4404. A programming and verification for the internal PROM is achieved by using a general EPROM programmer with an adapter socket. The function of this device is exactly same as the SD42C4404 by programming to the internal PROM. The SD42P4404 is OTP version of the SD42C4404 which internal ROM has been changed from MASK ROM to EPROM.
Ordering Information
Type NO. SD42P4404 Marking SD42P4404 Package Code. 28SOP/30SDIP/36SSOP
Pin Configuration
28SOP P12 / SO P11 / SI P00 / INT0 / TI0 P01 / INT1 PA0 / AD0 PA1 / AD1 P60 P61 P62/CLO RESETB TEST Vss XI XO 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Vpp / OEX EPD4 CEX EPA10 EPA9 EPA11 EPA12 EPA3 EPA2 EPA1 EPA0 EPA7 EPA6 EPA5 EPA4 EPD3 EPD2 EPD1 EPD0 EPA8 28 27 26 25 24 23 22 21 20 19 19 18 16 15 P13 /SCK VDD P13 / BUZ P42 / KS2 P41 / KS1 P40 / KS0 P53 / KS7 P52 / KS6 P51 / KS5 P50 / KS4 P83 P82 RESETB P81 VPP / OEX P80 VSS 15 14 13 P10 / SCK P12 / SO P11 / SI P00 / INT0 / TI0 P01 / INT1 PA0 / AD0 PA1 / AD1 PA2 / AD2 PA3 / AD3 P60 P61 / TEST P62 1 2 3 4 5 6 7 8 9 10 11 12 EPD4 CEX EPA8 EPA10 EPA9 EPA11 EPA12
30SDIP
36SSOP 30 EPA3 EPA2 EPA1 EPA0 EPA7 EPA6 EPA5 EPA4 EPD3 EPD2 EPD1 EPD0 29 28 27 26 25 24 23 22 21 20 19 18 17 16 VDD P13 / BUZ P42 / KS2 P41 / KS1 P01 / INT1 P40 / KS0 NC P53 / KS7 PA0 / AD0 P52 / KS6 P51 / KS5 P50 / KS4 P83 P82 P81 P80 XO XI PA1 / AD1 PA2 / AD2 PA3 / AD3 P60 P61 P62 / CLO NC NC RESETB TEST VSS 6 7 8 9 10 11 12 13 14 15 16 17 18 Vpp / OEX EPD4 CEX EPA7 EPA6 EPA5 EPA4 EPD3 EPD2 EPD1 EPD0 EPA0 31 30 29 28 27 26 25 24 23 22 21 20 19 P40 / KS0 NC P53 / KS7 P52 / KS6 P51 / KS5 P50 / KS4 P83 P82 P81 P80 NC XO XI 5 1 2 3 4 EPA8 EPA10 EPA9 EPA11 EPA12 EPA3 EPA2 EPA1 36 35 34 33 32
P10 / SCK P12 / SO P11 / SI P00 / INT0 / TI0
VDD P13 / BUZ P42 / KS2 P41 / KS1 NC
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SD42C/P4404
Device Operation
The operational modes of the SD42P4404 are listed in Table 1. A single 5V power supply is required in the read mode. All inputs are TTL levels except for VPP / OEX.
V PP = 12.50.5V PINS MODE READ PROGRAM VERIFY
PROGRAM INHIBIT
CEX VIL VIL VIL VIH
VPP / OEX VIL VPP VIL VPP
V DD 5.0V 6.0V 6.0V 6.0V
OUTPUT DOUT DIN DOUT High Z
TABLE 1. Operating Modes
MODE PIN NAME
EPROM MODE USER MODE
TEST RESETB
VIL VIL
V IH VIH V IL
TABLE 2. The modes of SD42P4404
DC Programming Characteristics
LIMIT
SYMBOL TEST CONDITION
PARAMETER Input Low Voltage Input High Voltage
Output Low Voltage during Verify Output High Voltage during Verify
UNIT MAX. 0.8 V DD 0.45 13.0 6.5 V V V V V V
MIN. VIL V IH V OL V OH V PP V DD IOL = 2.1mA IOH = -400uA -0.1 2.0 2.4 12.5 6.0
Quick-pulse Programming Quick-pulse Programming
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SD42C/P4404
Package Dimension
[ UNIT : Millimeter ]
28 SOP
28
15
10.333/40.1
7.493/40.1
1
14
17.900.1
0.20.1 0.420.1
1.27
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SD42C/P4404
Package Dimension
[ UNIT : Millimeter ]
30 SDIP
30
16
0.25
8.943/40.2
10.16
0 ~ 15
1 15
27.480.2
3.81 0.2 3.30 0.3
5.08 MAX
1.778
1.120.1
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